MSV11-J engineering info

Hi, I'm looking for engineering info on the MSV11-J. I was unable to find any prints online, or even a technical manual. (I have the User Manual, but it doesn't have much detail.) The main issue I'm after is working out which bits go into which chips. I have some other QBUS memory boards with no documentation where I created the mapping by just pulling chips, e.g.: http://gunkies.org/wiki/Q-RAM_11 but, alas, on all the MSV11-J's I've seen, the DRAM chips are not socketed - unlike QBUS memory boards by almost all the other manufacturers (e.g. National Semiconductor, Camintonn, etc - in fact, pretty much everyone _except_ DEC). Anyway, if anyone _does_ have an MSV11-J with the chips in sockets, I'd _really_ appreciate hearing from them! I'm not sure it's going to be possible to work it out from looking at board traces, since the MSV11-J is ECC memory, and I expect all the data lines just disappear into the two huge gate array chips. Anyway, I would appreciate hearing from anyone with anything on the MSV11-J. Noel