[CCTECH] Interesting tidbit on 6502

While browsing sites for 6800 information, I came across this quote from <http://wombat.doc.ic.ac.uk/foldoc/foldoc.cgi?Mostec>. which talks about the design goals for the 650x in comparison to the 6800. simplifying the decoder stage. There were no instructions with the value xxxxxx11, reducing the 1-of-4 decoder to a single NAND gate. Instructions with the value xxxxxx11 actually executed two instructions in paralell, some of them useful. < Now, I didn't look at an opcode map, but it seems that this is an interesting twist that I've never seen quoted when people discussed the mysterious undocumented 6502 opcodes executing what appeared to be multiple instructions. Any thoughts? Rich ========================== Richard A. Cini, Jr. Congress Financial Corporation 1133 Avenue of the Americas 30th Floor New York, NY 10036 (212) 545-4402 (212) 840-6259 (facsimile) _______________________________________________ cctech mailing list cctech(a)classiccmp.org http://www.classiccmp.org/mailman/listinfo/cctech