20 Dec
2007
20 Dec
'07
1:01 a.m.
Jim Battle wrote:
Robert Nansel wrote:
IMHO, to build anything
interesting and useful, the rules should be 256
2n2222s for the CPU. The memory design requirements, (unless you're
looking to build a CARDIAC clone with 10 cells)
should allow use of contemporary memory ( but not too much, just for
code, not ALU lookup tables). The guy that did the relay computer
allowed that, and he was able to execute interesting code?.
This kind of a CPU design screams bit serial execution. Take a look at
the Nebula design (OSU) on bitsavers for insight.
Cheers,
Jim Davis.
I've been thinking about a eprom/latch/sequencer based CPU since I
picked up a hundred or so 16 bit wide 64KW eproms from a dumpster at work.
That's BSCP as in "Bit-Serial Computer
Project." The 2N2/256 part of
the name is a nod to ham homebrewer Jim Kortge (K8IQY) who designed a
QRP rig called the 2N2/40 for a design contest about ten years ago.
The contest objective was to design and build a functional amateur
radio transceiver, using a maximum of twenty-two 2N2222 type
transistors.
Whether it uses drums, disks, or ultrasonic delay lines, my challenge
is:
1) To build a complete functional computer, including memory,
using no more than 256 2N2222-ish transistors (plus scads of diodes,
resistors, etc.).
2) Use no ICs or other parts that wouldn't have been available
to hobbyists ca. 1965.
3) Must be transportable in the boot of a mid-size sedan (i.e. a
few roughly 350mm cubical modules).
Anybody up for a contest to see who can design the most powerful
general-purpose digital computer given these constraints? I guess
we'd have to figure out what "powerful" means in this context, given
that it's likely never to exceed a few KIPS.
I'm prototyping DTL NAND gates and flip-flops today...
<snip archaric
memory design considerations( another project? ) >