10 Jun
2019
10 Jun
'19
9:19 p.m.
On 6/10/19 8:44 PM, Tony Duell via cctalk wrote:
You can detect sequential logic in the PAL by :
For each combination of inputs :
Read the outputs
Toggle an input (change from 0 to 1 and back again or vice versa)
Compare the outputs to what they were before -- if they have
changed then there's a sequential function on that input
Check the next input
Check the next combination of inputs
For purely combinatorial PLDs, see my blog entry on the subject over at
vcfed.org; I did the work to clone a few PALs some years ago and
documented the process.
FWIW, the setup to do this was a few TTL ICs connected to the parallel
port of a PC. Nowadays, I'd probably do the same with an inexpensive
MCU--the programmable nature of MCU pins lends a certain amount of
flexibility to the process.
Basically, you separate the inputs from the outputs and then run all
combinations of the inputs, observing the outputs. If the tristate
feature is used on outputs, there's a way to discover the difference
between a tristated pin and a genuine input.
There are a number of tools to perform reduction on the results, such as
Logic Friday. After that, you're left with a bunch of logic equations
that can be fed into a PAL/GAL assembler and programmed.
--Chuck