On Mon, 31 Aug 2009, Tony Duell wrote:
Where are you monitoring the grant lines? Remember
they are not bussed,
they are daisy-chained from one slot to the next. So an open-circuit in
one of them may mean what you're seing on the logic analyser is not what
the boards are seeing.
I have my logic analyser probes on the last slot of the bus. My idea was
that if the M9302 was returning SACK, I should be seeing what the M9302 is
seeing, if I'm running off the back of its bus slot.
The M9320 terminator (as has been stated here many
times before) can
assert SACK. It asserts SACK if a grant gets all the way to the
terminator -- that is if no device intercepts the grant. Unfortunately an
open-circut grant line will have the same effect.
Try remoing the M9302 (on a Unibus this short you don't need to
terminate the far end for testing) and see what happens then.
This did not occur to me due to a combination of assumption and brain
damage. Because I knew, from experience, removing the terminator did not
"fix" the problem, I had assumed it wouldn't help.
I have removed the M9302 and SACK is still being asserted - so the M9302
clearly is not the source of the issue, but I appreciate the reminder,
nevertheless, to remove another potential culprit.
And thanks to Henk, who has solved a small mystery - my M7856 has a solder
bridge between its NPG and NPR pins on the card-edge connector. I wasn't
sure why until now!
My thanks;
- JP