On 1/2/2014 4:46 PM, Alan Hightower wrote:
Getting back on point with what you are trying to
do...
Why not just add a simple SPI interface to a CPLD and use one of those SPI to Ethernet
bridge chips from Microchip? They run at 10Mbps which is surely fast enough for a PDP8 or
just about any vintage machine prior to the mid 90s. A couple 8 bit shift registers,
simple state machine, and parallel bus mapping would only take a couple dozen macro cells
and a hundred lines of Verilog - if that.
For version 0.1, KISS - Keep It Stupid Simple.
I would concur with this approach,
even if the resulting solution is not
complete.
I struggled for years to get into programmable design. I bought a
Spartan 3 board a few years back, but the need to learn an HDL and the
tooling itself just overwhelmed me. I was so afraid I'd bork this dev
board. But, the emergence of these $10.00 CPLD boards on eBay , and
having someone help me put a small design into one, started me off.
Now, I grok Verilog enough to do registers and counters and have hooked
it up to my C64 for testing.
Jim