Chuck Guzis pointed out that the PC was built from 8 bit peripheral
chips, which was where the 64KB problem came from.
When I saw the design, I thought it was really cute how they were able
to use one of the timer channels and one of the DMA channels to
implement a DRAM refresh circuit almost "for free". Steve Jobs made fun
of the design showing that just the CGA board had more chips in it than
the whole Macintosh. Sure, PALs eliminate a lot of chips but so did
6845.
Sadly, the PC AT was a lot less elegant. My impression was that they
divided the project among separate groups who weren't perfectly
coordinated. How many different ways does a single computer need to
translate key scan codes to ASCII, for example? And there was a circuit
with a bunch of TTLs just to generate the exact same signal that the
clock chip was already generating. That didn't make sense until you
found it came from an application note about the Multibus - if you have
more than one processor than the signal is no longer the same. This
allowed them to add the MASTER line in the ISA bus which would have been
neat if it actually worked.
-- Jecel