I dumped the Quay 900 boot ROM (marked "900boot V.2.2") and (mostly)
reverse-engineered some assembly source for it:
http://www.brouhaha.com/~eric/retrocomputing/quay/quay_900/
They try to boot from track zero side zero in MFM, loading eight 1KB
sectors (#1-8) into RAM starting at 3400h. After they load the sectors
successfully, they copy a small amount of ROM code into RAM at 0040h. The
copied code disables the ROM, does some computation (which I don't yet
understand) based on one byte at 4a05h, copies the image (actually 9KB), so
it doesn't actually have to live at 3400h (as long as it doesn't over
0040h-00ffh), then jumps to it. There's no validation of the bootstrap; if
the eight sectors load successfully, it's assumed to be valid.
I haven't yet identified what is being written to ports 11h, 12h, and 13h.
That may or may not have to do with setting up the serial port (6402 UART,
and probably the Z80 CTC for baud rate generation). The ROM doesn't appear
to actually use the serial port for anything.
The hardware seems fairly reasonable for a 1979 single-board design, except:
1) I can't identify any obvious data separator circuitry, so they're
probably using something really crude and unreliable rather than a PLL.
2) Why would they use a 6402 for the console serial port rather than a Z80
SIO?
3) There's a daughtercard with a Z80 SIO to provide two additional serial
ports. That may have been optional, but it was factory-installed by
soldering 40 pins on the daughtercard into a 40-pin footprint on the main
board (probably a Z80 SIO footprint). It's not socketed, so it can't be
removed or replaced without a huge amount of hassle.
If I'd written the boot ROM, I would have had it send a banner and status
out the serial port, and probably would have had it alternately try MFM
with 1KB sectors, and FM with 128 byte sectors.
Eric