16 Sep
2016
16 Sep
'16
7:33 p.m.
I don't
think this follows. Looking at the TMS 9900 datasheet, the
block diagram shows a full 16 bits on each ALU input and 16 bits
leaving it. There's no 1-bit bus directly to memory.
So the "bitedness" is determined by the memory bus? e.g., a 68008 is an
8-bit MPU? The PB250 is serial throughout--the registers are
implemented as 1 bit
recirculating devices that are 22 bits in length. Memory is addressable
in 22 bit words (no shorter unit of addressing is present) and is again,
loops of recirculating serial data. Basic operations are performed on
22-bit words. FWIW, it's a one-plus-one instruction set.
So why wouldn't this be a 22-bit architecture?
--
------------------------------------ personal: http://www.cameronkaiser.com/ --
Cameron Kaiser * Floodgap Systems * www.floodgap.com * ckaiser at floodgap.com
-- When two elephants fight, the grass and trees suffer. -- African proverb ---