On Mon, Dec 5, 2016 at 11:14 AM, Dave Wade <dave.g4ugm at gmail.com> wrote:
-----Original
Message-----
From: cctalk [mailto:cctalk-bounces at
classiccmp.org] On Behalf Of David
Bridgham
Sent: 05 December 2016 18:37
To: General Discussion: On-Topic and Off-Topic Posts
<cctalk at classiccmp.org>
Subject: Re: Odd "endianness" [was Re: RE: Base 64 posts to the list]
On 12/05/2016 12:17 PM, Chuck Guzis wrote:
Or how about architectures not using a word
length that's an integral
number of bytes?
You mean like any 36-bit machine?
Honeywell L66 & DPS8 used to have 36 bit words which originally contained 6
x 6-bit characters.
When they extended the machines to work with ASCII they put 4 x 9-bit
characters which I seem to
remember they called 9-bit bytes..
Yes; the Extended Instruction set handles 4*9bit, 6*6bit, 8*4bit (with the
4
padding bits scattered through the word).
From memory:
PDP-10: 36 bit word, 5*7bit characters.
PDP-15: 18 bit word, but it was so long ago, I don't remember....
CDC 6000: 60 bit word, 10 six bit characters.
PDP11 "middle endian" see "NUXI problem:
http://www.catb.org/jargon/html/M/middle-endian.html
PDP11 RADIX-50 3 characters packed into a 16 bit word; each character in a
0:39 set.
Back to Der Mouse question re: non-symmetrical mapping....
hton and ntoh are not meant has generalized data conversion; they are
intended as network data packet field conversion; the domain of ntohl is a
32bit unsigned integer; the range is a host object larger enough to contain
all possible values.
For hosts that are base 2 and have word sizes that divide 32bits evenly,
the functions would typically be identity or bit rearrangement, and the
htonl and ntohl functions would be symmetric -- I suspect that a good
mathematician could 'prove' that cycle length is always 2 given the
constraints.
Cases like 36 bits words mean that htonl is "lossy"; it throws away bits
and and ntohl pads the result with 0s -- they are not symmetrical, thus the
answer to the order-2 cycle question is 'not applicable'
-- Charles