29 Jul
2014
29 Jul
'14
1:15 p.m.
On 07/29/2014 09:54 AM, David Riley wrote:
The PowerPC 601 retained a number of instructions
inherited
from POWER that were dropped in subsequent second-generation
CPUs (603/604). It wasn't a straightforward shrink, though,
as some additional instructions were added (FRES, for example,
the fast floating-point reciprocal estimate, is 603 and up and
is optional).
A lot of the POWER instructions jettisoned were ones one might
traditionally associate with "business logic" like one might
see on an IBM mainframe; instructions like lscbx, which is a
weird-ass instruction but could certainly have applications
in a specific domain.
STAR had 3-address BCD instructions with a 16-bit length specifier for
the byte length. At 2 digits per byte, that came to 128K decimal
places. I'd meant to try a divide of a 128K digit decimal by a 64K
digit one just to see how long it would take. Never did, though. On
the 1B, it might well have amounted to starting the instruction before
going home for the day and checking back in the morning. If only the 1B
could actually have stayed up that long...
Not microcode per se, but I seem to remember that Rabbit Semiconductor
took the Z80 and eliminated quite a few instructions for their MCUs.
--Chuck