Q-Bus Memory Diagnostics and Repair

Well, the CSR and RAM address detection circuits are separate (page 5 of 11 in the drawings), so since both are not responding, it has to be something in common: perhaps something on the input side like a bus receiver (e.g. BSYNC, pg 8), perhaps something on the output side like a control line driver (e.g. BRPLY, same page), or some of the common circuitry that drives it (e.g. TRPLY generation on pg. 5). The way to tackle this is to write a two instruction loop that reads the CSR (that will be easier to grok than RAM access); it will need a NXM trap catcher which just does an RTI, too; and don't forget to set up the SP. Then, pick some likely point half way along the signal path (e.g. MSEL, on the right hand edge of pg. 5), and see if that's doing what it should. If no, start moving back upstream; if it is OK, start going downstream from there. Yes, either/both for this, and the sister CMV4000 (same board with 256K chips) would be really fantastic to locate. I'm in the process of working out what all the jumpers/mean do, and will work out which chips correspond to which bits, and document them, like this page: http://gunkies.org/wiki/CMV-504 However, we're not there yet for this card, so... That shouldn't make a difference. I can't make head or tail of the output either; can anyone else help? (I don't use DEC diagnostics, I have rolled my own PDP-11 memory diagnostic.) Well, that is a good hint... :-) Step A is to find out what the failing location(s) are, and what the bad data is. So either figure out the DEC memory diagnostic output, or roll your own (you can have mine if you like, I have Unix assembler source, or I can give it to you in .LDA binary). Noel