11 Aug
2013
11 Aug
'13
4:27 p.m.
I've been poking about a bit more and am fairly convinced the LSI-11
data chip (1611) is at fault. I added a BDV11 termination board and the
other signals that I believe to be good (BSYNC, BDIN, BDOUT, etc)
cleaned up a bit but the main address/data lines are still very bad.
I've uploaded some photos to flickr that show the signals. If anyone is
familiar with Qbus signals or has an LSI-11 based machine to compare
with I'd really appriciate feedback. In particular I've shown 2 pictures
comparing BSYNCL with BDAL2L and BDOUTL with BDAL2L which show the
"oscillating" BDAL lines. I then look at pins on the 1611 (data chip)
and compare clock phase 4 with the microm bus signal WMIB02L (which
looks fine) and finally two different views of WMIB02L with WDAL02H
(that drives Qbus BDAL2L) at different time scales. Particularly telling
is the 2.5us view of WDAL02H that shows a very odd waveform
(http://www.flickr.com/photos/17208732 at N00/9489886932/in/set-72157635031597000/)
Anyways, if anyone fancies taking a look the pictures are @
http://www.flickr.com/photos/17208732 at N00/sets/72157635031597000/
Regards
James
On 03/08/2013 18:40, James Wilson wrote:
Hi, I've recently got around to try get and my
MINC-11 working and not
getting very far! So I'm after advice.
Right now I have a minimal system consisting of
M7270 LSI11/2 CPU
MSV11 RAM
DLV11/J serial/console
PC PSU with reset circuit to generate BPOK and BDCOK
Here's a rough guide to what I've diagnosed so far:
1. Jumpered the CPU to boot into ODT and checked the jumpers on the
serial board for console address
2. No activity on the console port on power on or reset
3. Double checked the timing of BDCOK & BPOK and they're in spec.
4. Debugging on the DLV11 reveals the MATCH signal isn't being
generated from the address decode logic
5. The bus looks partly correct. SYNC, BDIN & BDOUT look fine. The
mux'd data/address lines are active in the BDIN/BDOUT cycles but
within those cycles the signals "oscillate" (they cycle 20-30 times
within a single BDIN/BDOUT pulse, which doesn't look good!)
6. Probing around the CPU board now. All the signals look correct,
with the exception of the 16 data/address lines generated by the data
chip (1611). Power and all 4 clock phases look good as does the
internal data/control/microm WMIB bus and the WAIT signal from the
control chip.
7. OK, so looks like the 1611 is faulty. I wanted to check it wasn't
the 1611-Qbus interface circuitry so I "modified" a junk 40 pin socket
to sit between the 1611 and the on-board socket and removed pins 3-18
(hence isolating the WDAL0-15 signals of the 1611 from the rest of the
CPU board). This made no difference - the signals on those pins are
very weak (2V peak) and "spike" for very short periods at the
beginning of data read/write cycles.
So I'm stuck and I have no spare 1611 or other LSI-11 CPU module to
try. Does anyone have a spare 1611 or complete LSI11/2 they'd be
willing to lend/sell? I'm in the UK. Alternatively, any advice for
other things to check? I can try and grab some screen shots of the
signals if that would help.
Thanks for any help!
James