8 Aug
2009
8 Aug
'09
4:24 p.m.
On Fri, 7 Aug 2009, Johnny Billquist wrote:
Interrupt stuff is usually a bit more complicated than
what you seem to
envision above. You have the interrupt request line, the interrupt grants,
which is followed by the vector at the interrupt acknowledge, and then you
have the interrupt dismiss stuff, which cause the device to remove the
interrupt request, and allow other devices at the same priority, but farther
from the bus arbiter to get their interrupt through.
Interrupts are actually a bit odd on the UNIBUS, where interrupt
requests are really just prioritized DMA requests. A UNIBUS device
asserts a bus request and gets a bus grant, at which point it may do
*any* kind of bus traffic. Providing a vector to the computer is just a
specialized kind of DMA write; one with an implied address, as it were.
It's been a few years, time kills brain cells, yadda yadda yadda, but I
did actually design a UNIBUS processor board once upon a time. With a
UNIBUS map. The PDP-11 UNIBUS map is not as simple as the one used on the
VAX.
--
roger ivie
rivie at ridgenet.net