23 Jun
2007
23 Jun
'07
3:46 a.m.
On 23/06/2007 02:43, Johnny Billquist wrote:
Even the normal QBus CPUs don't work that way. Yes, there are DATIO
cycles which do read-modify-write, but most instructions use DATI or
DATO cycles.
Allison <ajp166 at bellatlantic.net> skrev:
It's part
of the memory to memory design and the way intructions work.
It's annying as micros go but ALL PDP-11s word that way and the T-11
is a PDP-11 in LSI.
No, it isn't. Where did you get that? (And I've just triple checked my
memory by actually reading through parts of the 11/40 and 11/70 manuals.) So in short: writes on PDP-11 systems in general
don't imply a read.
That's a T-11 thing if it does, and is probably related to simplifying
the design (internal) more than anything else. I don't think they did it
with core memories in mind. All Unibus core memories have their own
write-back. That isn't something the CPU bothers with.
For the Q-bus, I don't even know if any core memories exist.
Yes, there is a core memory (MMV11), but it is perfectly happy with
normal DATI and DATO cycles.
--
Pete Peter Turnbull
Network Manager
University of York