21 Apr
2011
21 Apr
'11
2:02 p.m.
On 21/04/11 01:20, Sridhar Ayengar wrote:
Because the standard board is frickin' huge, a massive power hog and
WHo cares how large it is, or how much power it draws? I am dead serious,
what does it matter.
I would
be your first customer. I've always wanted to play with a 3B1,
even
a facsimile.
Why would you need to do it in an FPGA? It's a 68k with fairly
"standard" hardware. known to be a wee bit on the unreliable side.
And if it was an FPGA with RAM hung off it, I am pretty sure there'd be
_none_ still working, and unless the original design data
(vhdl/schematics/etc for the FPGA) was availale, I don't see how they
could be repaired.
Yes, I know you're one of the 'good guys' and publish your FPGA desings,
but docuemtnation does get lost....
Drop the design into an FPGA and you go from several huge boards full of
TTL to one Eurocard, an FPGA, and a couple of RAM chips.
With nowhere to connect the 'scope and logic analyser to debug it, no
interesting signals to look at... Might as well jsut buy a modern PC.
-tony