8 Feb
2015
8 Feb
'15
3:20 a.m.
Brent Hilpert wrote:
On 2015-Feb-07, at 11:20 AM, Holm Tiffe wrote:
You are simply wrong. I'm answered in a thread reagarding a fault in a
clock circuit of an PDP11 Processor Board, not in a discussion regarding
the design of a new board with TTL cicuits.
Besides of that Petes sentence "TTL is supposed to have a 1K pullup (to
limit possible transients); LSTTL can be directly connected to Vcc." above
is plain wrong too.
Direct me to a datasheet containing this please.
Pete Turnbull wrote:
No you didn't. While the context of the discussion is testing and that may have been
your intention, your comment specified no such qualification, and as such at best left it
ambiguous/unclear.
Pete's comment was valid clarification and additional information (although I could
have minor quibbles with some of the technical phrasing). On 06/02/2015 07:44, Holm Tiffe wrote:
Yes Pete, not all People over here are totally braindead.
I've told him that he can leave out the +5V Connection for testing
purposes, for nothing other. You don't ned no pullup for +5. All open TTL
inputs are reading High w/o
any pullup.
Yeah. So someone at Commodore thought when they designed one version of
the PET. We had a few that erratically misbehaved. It turned out that
one input on a 74LS00 (I think it was) was floating, and switching noise
made it erratic. Floating inputs place the internal circuitry in an
intermediate state, can cause increased current draw, typically slow the
device down by increasing switching times, and can cause misbehaviour.
TTL is supposed to have a 1K pullup (to limit possible transients);
LSTTL can be directly connected to Vcc.
--
Pete
Pete Turnbull
Anyways (for Noel), everyone's right:
- An open TTL input will generally function or act as a logic high.
It was not unknown for designs to leave inputs open for static-state high,
but it is considered poor practice and can result in problems in some circumstances.
But not under Noel's circumstances.
Regards,
Holm
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