The typical application of most 8255's, I'm going to guess is that they're
initialized at the start of an application or when the computer is booted
and the mode is never fiddled with thereafter.
As I mentioned in my reply to Allison, it's worse than that.
On reset, the line is an input, so a TTL input connected to it will treat
it as high (it would be good practice to add a pull-up resistor, sure)
On writing to the mode register, that TTL input will be forced low
Then you might make it high again.
Your external circuit has to be happy with this (it can't assume the line
will stay high as the chip is initialised). The other parallel chips
(e.g. 68721, 6522) don't have this problem, with those, you can write to
the output port register and make outputs effectively 1 _before_ writing
to the direction register. Then if you have an exetrnal pull-up, or
assume a TTL input floats high (naughty!), you will not get a momentary
low glitch on the line.
Does the 8251 USART also have some sort of strange initialization problem?
It's been a long time since I've used one, but I seem to recall a gotcha.
IIRC, it's impossible in gnneral to force it into a known state. If
you're setting it up for synchronous operation and forget how many of the
initialisation bytes you've sent it, there's no software way to force it
into a known state from where you can start the initialisation again (a
hardware reset will do it, of course).
-tony