Qbus split I&D?

On Mar 17, 2015, at 1:04 PM, John Wilson <wilson at dbit.com> wrote: On Tue, Mar 17, 2015 at 12:39:21PM -0700, Guy Sotomayor wrote: I'd be slightly worried that there are conditions being assumed here, even if the MRAM data sheet doesn't seem to say so. F-RAM claimed unlimited writes, but under slightly cherry-picked conditions that might be exceeded after all. You could certainly write the whole memory from beginning to end all day long, but whaling on just a small area (like the stack) could be trouble. Obviously I hope I'm wrong -- MRAM *looks* wonderful! I used battery-backed SRAM in the Unibus RAM card I prototyped a while back (and just recently got working and have been finishing the XMOS firmware for). The SRAM is cheap and fast and draws hardly any current (so it's nothing like a lead-acid BBU setup -- AAs are fine and a CR2032 might even last a while, so I've got one dangling off for testing to see if Rev B should have coin cell holders), and once the battery is there, it's a nice excuse for a TOY clock (my favorite KDJ11E feature that all PDP-11s would benefit from).