From: "Mattis Lind: Tuesday, September 06, 2016 2:11 AM
* Use a PDP-15 MM15 stack and sense/inhibit boards.
I have several off these. Adding a small backplane, put the X/Y drivers,
sense amp/inhibit drivers and level converters there and then adapt to the
existing slots for the memory module. It would be a horrible mixture of TTL
and transistors. But it would still be core memory.
There's a guy on eBay who periodically offers stacks for 8/I or 8/L:
http://www.ebay.com/itm/172295154098
Those might (or might not) be more straight-forward to interface (though
DEC's proof of concept is a TTL interface).
* Use solid state technology. Possibly inside the
memory box so it looks
real but emulates the actual core memory module.
Any ideas how this could be done in the best way?
I did some (theoretical) work on a core replacement for the 8/S
a few years ago based on some ideas from John Price. That's
embedded in the "memory" drawing in
http://svn.so-much-stuff.com/svn/trunk/Eagle/projects/DEC/PDP8S/.
(See sheet 2; most of the schematic is just the schematic of an 8/S.)
Somewhere I also explored a notion of pulling the inhibit driver
and sense amp stuff, replacing the stack itself with a memory board,
then replacing the inhibit drivers and sense amps with interface
boards that knew how to talk to the new memory board. If I recall,
that was in the 8/I or 8/L context, though.
I never built any of it, it was just a thought exercise. There seemed
to be plenty of board real estate to work with, though.
Vince