1 Aug
2007
1 Aug
'07
7:03 p.m.
On 1 Aug 2007 at 18:56, Jim Leonard wrote:
Bit 4 of Port B at I/O address 61 hex on an AT and
later machine is a
read-only bit carrying a signal called Refresh Detect. This signal
comes from a 'T' (toggle) flip-flop which is clocked by the refresh
trigger signal, which comes from CTC channel one. Assuming that the
RAM refresh rate has not been changed, this bit will toggle (change
from 0 to 1 or from 1 to 0) once every 15.0857 microseconds (the exact
value is 216/14.31818), and Port B can be polled in a loop to
implement a delay of any length. For short delays, with interrupts
locked out, this gives an accurate and very convenient relative delay
mechanism. However, for long delays, it would be naughty to leave
interrupts locked out for the entire delay period, and interrupts will
cause gaps in the polling process, slightly lengthening the delay (it
will wait longer than expected).
I believe I mentioned that it wasn't present on the PC-XT and that it
was AT-and later. In any case, it's easy--a simple 65K loop
checking this bit for toggling will root out the aberrent machines.
Fortunately for everyone, these are mostly the slower (x88/86/186)
systems that are very amenable to a simple counted CPU loop.
When I do my delay, I wait for the bit to flip once, then again, then
again. Simple--even my old NT and 98 diskette device drivers worked
with it.
Cheers,
Chuck