I've always detested the term "stop
bit"--this should have been
called "inter-character time" or some such thing. It's not a bit; it
carries no information
It carries just as much information as the start bit. Bits do not
necessarily carry information in the sense of anti-redundancy; for
example, the high bits in the octets making up this email carry
little-to-no information, since they're all the same, but they're still
real bits just the same.
and talking about 1.5 "bits" in the case of
75 bps 5-level
transmission is just plain insanity.
I'm not sure what's "5-level" about it, but I think "just plain
insanity" is overstating the case; it seems fair to me to consider it a
kind of shorthand for "1.5 bit times".
Back to Eric's observation--does anyone with a
mechanical terminal
(e.g. ASR 33, Flexowriter, 2741, etc.) accommodate shortening the
"stop bit" interval? In particular, those devices requiring only 1
"stop bit"...
For reliable operation, receiving devices must accommodate a slightly
short stop bit; otherwise, if the sender's clock is slightly faster
than the receiver's, streaming characters back-to-back will produce
phase drift and eventually a framing error.
I don't know enough about most UARTs to comment on them in this regard,
but I think I once saw documentation on one which implied that it was
willing to tolerate receiving a character that was only (what the
receiver's clock says is) only a little over 9.5 bit times long,
because it samples in the middle of (its idea of) each bit time,
starting half a bit time from the beginning of the start bit, and,
provided the stop-bit's sample shows the correct level, it is
immediately ready to accept a new start bit's beginning after that
sample.
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