18 Dec
2008
18 Dec
'08
10:30 p.m.
Philipp Hachtmann wrote:
Ben,
No. That's the price for using arrays of CPLDs.
In an FPGA you get waste amounts of logic and very fast RAM. The only
hassle is soldering FPGAs.
But cheap development boards can be found.
That is the real reasion I don't use them ... times may have changed
but when I looked several years ago all the development kits
did not have a easy way to program the config Proms.
So everybody else can do that, too - on an FPGA, of
course :-)
I got a CPLD why can't I have the same fun too!
Oddly the only cheap way to program the CPLD's is with CUPL
and all the designs for a VGA display I can't compile easly.
Apropos "main adder": one thing about my
PDP-8 design: It is designed
for speed, not for size. So there are a lot of
adders - no adder will get it's input switched. I always have a PC+1,
PC+2, AC+1, MD+1, etc.
Results are selected by multiplexers.
Good design, since you have logic to burn.
Philipp