2 Oct
1998
2 Oct
'98
11:43 a.m.
Tony Duell wrote:
The advantage of the hardware PLL and clock
synthesiser is that it's also
possible to write the disks with the pulses in the right places. I've
been thinking about making a 'universal' controller that can not only
read obscure disks, but can also produce them.
No, if you oversample at a sufficient rate, writing disks is no problem
either. My suggested 8x the channel code rate should work fine; 16x or
more would obviously work fine but would be overkill.
Software PLLs are much easier to muck about with even than DPLLs in FPGAs.
If you're going to use a clock synthesizer (even though it is unnecessary),
you might as well simply use it for the sample clock at a multiple of
the channel code rate, and still do the data decode (or encode) in software.
Eric