Subject: Re: Q-bus to CF [was: IOmega]
From: woodelf <bfranchuk at jetnet.ab.ca>
Date: Mon, 03 Mar 2008 11:48:16 -0700
To: General Discussion: On-Topic and Off-Topic Posts <cctalk at
classiccmp.org>
Bob Armstrong wrote:
Sridhar
Ayengar (ploopster at
gmail.com) wrote:
Or if you're willing to write an MSCP layer
into your controller firmware.
I actually think this is the "right" way to solve the problem in the case
of the PDP-11 and VAX, but then controller is no longer a simple device.
The question is who is the interface for. Is this like the SCB1620 interface to provide
a hard drive to a small system that may not have any other major storage device,
or is this for a commercial system that has a *Standard* I/O allready?
For commercial you have to deal with the holder of the MSCP intellectual rights.
The other issue is MSCP is an intelligent system that has DMA and is able to run
linked lists for queued IO.The pro for MSCP is most all of the DEC OSs had drivers
for it. The minus is complex, firmware intensive, DMA and temporary bus master
and it would try to do some of the buffering that IDE drives already do well.
Simple IDE/CF to Qbus(Ubus)... design is near complete copy of a bdirectional parallel
port described in the Small Computer Interfacing Manual with a bit more to look like
IDE bus and isolate reads and writes. Minus here is the IO is slower using PIO
(but still faster than RX02), a driver is required for most OSs. The plus is simple
to construct, the driver needed is very simple, if CF is used the board and a 32MB
CF is a complete package with as much space as many small Qbus 11s ever had!
I'd suggest to anyone that does this a basic boot rom on the board is a sane thing.
For RT11, the DD (tu58) driver would make a good prtotype as would the HX previously
mentioned. The RT-11 docs cover creating new drivers and VMS docs too.
NO, I don't volenteer, way too much going on right now.
Allison
Bob
PS:
I was reading the 1966 PDP 8 user handbook, I am finding usefull programing
information since they give real detail in I/O devices.
Any ideas on how impliment POWER on fail IRQ and restore?
First you must have core or ram that looks like core (doesn't lose data on power
fail).
The assumption for real PDP-8 is always core and program in core.