12 Feb
2021
12 Feb
'21
8:14 a.m.
On 02/12/2021 09:04 AM, Mattis Lind via cctalk wrote:
I am a bit confused about the READ GATE. It has to
be deasserted
in the PLO SYNC interval. Why is that? I am clearly missing something.
ESDI has a clock separator built into the drive, with logic
to decode the data format and convert
to a standard protocol. Many of the higher-end drives used
some form of RLL encoding internally.
I'm just guessing here, but I suspect that the sector
headers were written during a drive format, and then never
written again, as some recently discussed DEC drives did.
So, there'd be a synch discontinuity between every sector
header and the data block. I'm guessing a drop and then
re-assertion of read gate would prepare the PLO to resynch
quickly at the beginning of the data packet. The controller
would know when to do this, as it would read every sector
header looking for the desired sector, and as soon as the
header data ended, it could wiggle read gate.
Jon