23 Jan
2014
23 Jan
'14
8:52 p.m.
On Jan 23, 2014 8:34 PM, "Chuck Guzis" <cclist at sydex.com> wrote:
In theory, one could simply start the "hunt"
for the next start bit as
soon as the last data bit frame had passed--I have no
doubt that many chips
actually work exactly this way--that the "stop bit" is a simply an
indeterminate marking period until a space signals the start of the "start
bit".
Actually standard practice did not ignore the received stop bit entirely.
The stop bit was sampled at the time the receiver considered to be the
nominal middle of the bit time, and if it wasn't in mark state, signalled a
framing error. However, the leading edge of a start bit could be recognized
on the very next sample, typically 1/16 bit time later. Rate mismatch
aside, this means that the transmitted stop bit only has to be 9/16 of a
bit time (1/2, plus the 1/16 sampling uncertainty).
When you consider rate mismatch, it becomes worse. However, V.14 stop bit
shaving is only done in modems that retime the bits delivered to the DTE
locked to a quartz crystal, so the 12.5% (or 25%) V.14 "error" in the stop
bit timing is never on top of more than another 0.02% of timebase error.
What I don't know is if the period of the
mandatory space bit on receive
is also governed by the "number of stop
bits" setting in the mode setup
word--or if, as in many UART chips, this controls only the length of the
stop bit on transmit.
Interesting question. I suspect that ot doesn't validate the second rx stop
bit (or the extra half when 1 1/2 is specified), nor delay start bit
sampling for it, but I haven't tried it.