10 Apr
2007
10 Apr
'07
6:45 p.m.
... Which is nice, but counts as 'yet another piece
of hardware to build'.
Plus it uses an Altera CPLD, which means I'd need to build a Byteblaster
cable and find a machine to install Altera's development software on (it
doesn't get on well with the Xilinx software).
Plus I doubt it can simulate motor speed variation, which makes it useless
for testing decoding of 'odd' formats.
The good thing with open-source CPLD/FPGA projects is that
- You can always modify to suit your needs
- You can always change the CPLD/FPGA and recompile the code
- You can always improve it
:o)
Greets
Alexandre :o)