19 Dec
2008
19 Dec
'08
8:39 p.m.
Good morning!
Sorry for the off-topic post...
Am 19.12.2008 um 16:16 schrieb Philipp Hachtmann:
What you say is true for FPGA-internal signals but the output drivers
_can_ be switched to high-impedance.
The open-collector driver you were asking about originally can be
emulated by assigning "Z" directly to the IOB, switching it to high-z.
That will only work if the signal you use is routed directly to the
IOB => use only in top level entity to be sure.
-- exhibit A:
signal_ext <= output_i when enable_i = 1 else (others => 'Z');
input_i <= signal_ext;
-- exhibit B
signal_ext <= '0' when output_i ='0' else 'Z';
input_i <= signal_ext;
Is that what you wanted to do?
For higher voltages that 3.3V you will need two pins, see
<http://www.mikrocontroller.net/topic/114162
You can
emulate that in std_logic with a single driver driving an "H"
(the "pull-up"), and everyone else drives either "0" or
"Z".
Yes. You can write that. But the synthesis tool - if it eats that -
will generate
many ORs... So avoid it. In the company I have worked a bit for,
MANY constructs
were simply forbidden. Thinks like Z, H, L in std_logic are
suspicious :-) .
Cheers,
Sebastian