15 Jan
2017
15 Jan
'17
7:35 a.m.
On Jan 14, 2017, at 3:29 PM, Cameron Kaiser
<spectre at floodgap.com> wrote:
Dijkstra's objection wasn't to linkage via a register -- after all, his earlier
machine (the Electrologica X1) does that too, or more precisely via one of 16 low core
locations. The problem with the 1620 is that the link register is not readable --
it's an invisible register. And that's pretty much unique; all the other machines
use a program-accessible register. So you can context switch the link address, but not on
the 1620.
The other obvious issue with the 1620 is that it has no interrupts, so it's hard to
see how you would do multiprogramming. And one other, more obscure, objection is that
while it has paper tape readers, it's incapable of reading paper tapes with arbitrary
data. It only accepts tapes punched with the specific character coding it likes.
paul
Oh my! You couldn't have a subroutine that
called another
subroutine, using their surroutine call/return instructions! I never
knew that!
Strictly speaking, that would still be true of any CPU that uses a link
register instead of a stack for return addresses (most RISC CPUs including
PowerPC, ARM and MIPS; TMS 9900; etc). These architectures have to explicitly
save the return address in the LR as part of the callee function prologue
just as these older systems would have had to (or the equivalent operation).