Variable length (in bits) instructions (was Re: ENIAC ....)

On 31 Jan 2011 at 14:30, Rich Alderson wrote: Are we talking about instructions themselves, or their operands? In either case, the 1401 qualifies--it's a variable word-length machine and instruction length is dependent on the presence or absence of operands. So, there is only one opcode for the "ADD" instruction, but I can write: A 123 456 Causing the (variable-length) number whose low-order digit is addressed by 123 to be added to the (variable-length) number whose low-order digit is addressed by 456. I can also write: A 123 Same opcode--but this indicates that the number addressed by 123 is added to itself. Or I can write: A Which adds two numbers preceding (in memory) the pair last addressed by an A or other instruction. Similarly, the "unconditional branch" and the "conditional branch" instructions use a common opcode, but the conditional branch appends a digit that specifies the condition. The "trick" behind all of this is that the instruction execution logic locates the opcode by scanning until it finds a character with the word mark set. While it's scanning, operands are shifted through the operand regsters. So, I submit that the 1401 is a variable length machine (it's decimal, by the way) both in the sense of data that's being manipulated and the instructions themselves. Have I missed a third category of "variable length"? --Chuck