Fred N. van Kempen wrote:
Doc,
I'm going over the card configuration of a
PDP11/84 and reading the
online documents, and I'm confused about a couple of things. I need to
get squared away on this, as I'm testing some drives needed in
production and only have Unibus SDI adapters.
oooh. I'd kill for an UDA50. You lucky [nastiness suppressed] :)
Unibus is a straight-through wiring, with the bus being on each slot
on connectors A and B. C-F are for the boards. So, on any given
backplane (such as a regular BA11-L 9-slot backplane), you will
have "BUS-IN" (slot 0-AB), "BUS-OUT" (slot 8-AB), and
"POWER" (the
various power connections.) BUS-OUT can be another Unibus cable
(the very wide white flatcable), or an M920 interconnect module
which sits inbetween two backplanes to bridge them together, or
anohther M-type module being the terminator (M913 I believe) of
the bus.
OK. So the rearmost connector in the rackmount chassis is the A
connector?
Sneaky detail: Unibus has DMA support, and the DMA
(NPR - Non-Processor
Request) lines are wired-through. The *grant* line, however, often
gets broken by a card, to make sure cards "behind" it (on the bus)
dont grab the request. After removing such a card (the UDA50 is an
example) you have to either re-wire the NPG (Non-Proc Request Grant)
lines (on the C block, I believe) or insert an NPG-bridge card which
effectively does the same.
OK. Sanity check. A slot with an adapter using DMA needs the NPG
grant line *removed*, and if the board in place needs it in place. Does
breaking the NPG grant for a DMA adapter break the grant for succeeding
cards?
First, run ONLY the CPU with the terminator. The
11/83 CPU board already
has console and such, so this is already a working system which displays
output. If that works, add a simple board (RX11). Then add the UDA50,
which is not simple..
Maybe I need more info here, concerning the UDA50. I did find the
UDA50 manuals - do I need more than that?
The 8190 indeed is an 11/83 CPU. The PDP-11/84 system
is a Unibus based
system, but with a Qbus core and a bridge inbetween- this is so DEC did
not have to do another (unibus) CPU. So, the 11/83 + Qniverter = 11/84,
which is why Megan's info is correct.
Cool. Assuming access to needed storage and communication, are there
any significant pros or cons to running it in a QBus system, as opposed
to Unibus?
And, does that mean that all the 4x4 slots in the system chassis are
Qbus, as in I can run an RQDX3?
Doc