23 Dec
2006
23 Dec
'06
1:29 p.m.
On Sat, 23 Dec 2006, Peter C. Wallace wrote:
Peter Wallace
Mesa Electronics
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Date: Sat, 23 Dec 2006 13:25:19 -0800 (PST)
From: Peter C. Wallace <pcw at mesanet.com>
Reply-To: "General Discussion: On-Topic and Off-Topic Posts"
<cctalk at classiccmp.org>
To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at
classiccmp.org>
Subject: Re: multiple CGA cards on ISA bus?
On Sat, 23 Dec 2006, Richard wrote:
On second thought, it may require only AEN to be decoded so maybe 3 or 4 ttl
parts...
Date: Sat, 23 Dec 2006 13:31:27 -0700
From: Richard <legalize at xmission.com>
Reply-To: "General Discussion: On-Topic and Off-Topic Posts"
<cctalk at classiccmp.org>
To: cctalk at classiccmp.org
Subject: multiple CGA cards on ISA bus?
Hi,
Does anyone know if its possible to have multiple CGA cards on an ISA
bus? I have a feeling the answer is no...
Probably without surgery most CGA cards would have fixed memory and I/O
addresses...
If the answer is no, can anyone recommend a good set of docs on the
bus interface of a CGA (memory mapped regions, relevant BIOS vectors,
ISA bus transactions, etc.)?
I have a project where I want to gang drive a group of CGA displays.
Initially my thoughts were to just have N computers with CGA cards and
gang drive the computers over a serial port.
However, lately the talk of hardware on this list has got me thinking
that it might be better to create a single FPGA implementation that
gang drove N cards directly and dropped the machines in the middle.
Hardly needs a FPGA, just decode /IOR /IOW /MEMR /MEMW with 4 1-8 decoders
(maybe 74F138s). Then use a 3 bit latch to drive the decoder select lines
that select the card. You could do some fancier things with a CPLD (have a
bit mask to do the write gating, allowing you to write to multiple selected
cards at once)
Shouldnt be more than 7 or so TTL chips or a single ~2.00 CPLD
I'm thinking that on standard ISA bus only a single CGA card could be
present because its vectors and memory map are fixed and not
relocatable. So I'd need to gang up the cards by creating my own
motherboard with ISA card edge connectors where each card thinks it is
the only thing on the bus and then select individual cards and drive
them with the FPGA.
Things that would help me in this project are:
- detailed information about the CGA video card,
both electrically and software wise.
- detailed electrical information about ISA bus cycles
- existing FPGA designs that might have useful building blocks I could
steal: ISA bus cycles, CGA implementation, etc.
--
"The Direct3D Graphics Pipeline" -- DirectX 9 draft available for download
<http://www.xmission.com/~legalize/book/download/index.html>
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Peter Wallace
Mesa Electronics
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