19 Aug
2006
19 Aug
'06
3:51 p.m.
[CoCo 3 GIME]
Any timing diagrams for DRAM access? You'd recognize the page mode
cycles by the lack of a 1:1 pairing of RAS with CAS.
Sure. But I think the only timing diagram is a 'representative' one
showing a normal cycle. No idea if it does other types of cycle as well.
-tony
I would assume the controller would exploit page mode
references
(especially when dealing with sequential accesses like video).
I am not sure, and the service manual (which I have) doesn't make any
obvious reference to this.