> >The design goal was a low-cost (smaler chip)
design, realized by
> simplifying the decoder stage. There were no instructions with the value
> xxxxxx11, reducing the 1-of-4 decoder to a single NAND gate. Instructions
> with the value xxxxxx11 actually executed two instructions in paralell, some
> of them useful. <
> Now, I didn't look at an opcode map, but it seems that this is an
> interesting twist that I've never seen quoted when people discussed the
> mysterious undocumented 6502 opcodes executing what appeared to be multiple
> instructions.
I've actually heard that some of the
undocumented 6502 opcodes appeared to
do two operations,
They sure do. For example, I believe there's a LAX that loads the
accumulator and X register simultaneously. Others are considerably more
useless, and there's several HCF-type instructions also.
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Cameron Kaiser, Point Loma Nazarene University * ckaiser(a)stockholm.ptloma.edu
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