On 24 Jul 2008 at 14:18, Brent Hilpert wrote:
I had to make a variable-length binary delay line a
year or two ago for a
project to get two 1950s-era Deskfax fax machines communicating (needed storage
for one line of the image because the drums were not synchronised, and could
start at an arbitrary phase relationship to each other). It was only a couple
thousand bits of storage needed but I ended up just using 1 bit-line of an 8*8K
static RAM and ignored the other 7 bit-lines. It was much simpler than trying to
optimise on a smaller 8*x or 4*x RAM and feed it with shift registers. The
variable delay was accomplished with two counters (read and write) started at
different times and multiplexed into the RAM address lines.
One could even use an 8x SRAM to form 8 separate loops (or 16x to
form 16...). Select the appropriate loop using a little mux/demux
glue. No need for shift registers. Have to latch all the bits to do
a write, though, but still not too bad.
Thanks for the inspiration...
Cheers,
Chuck