23 Jun
2016
23 Jun
'16
4:17 a.m.
Are they general purpose, no?they require specialized
> programming to perform the computations. But the HPC > (high performance
computing) guys will do what it takes (and have for > decades) to get the most
out of the HW.
I have a friend that works for NSA that does just that.
Dwight
________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Guy Sotomayor Jr
<ggs at shiresoft.com>
Sent: Wednesday, June 22, 2016 4:54:04 PM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: Re: CDC 6600 emulation - was Re: How do they make Verilog code for unknown ICs?
On Jun 21, 2016, at 11:07 PM, dwight <dkelvey at
hotmail.com> wrote:
Well Ben
I'll tell you a secret. I work for one of those two companies.
Processors are designed from such code, simulated and then
synthesized to silicon gates. I don't think that is too much of a
secret.
How the architecture is done is very much a secret. I can tell you that it is more
complicated than one person can completely understand. It is a team effort with many
people working from a general description of what each part does and how it should
interact. Some work only on arrays while others work on floating point alu's and so
on.
Having worked for both of those companies, I can also state the the number of people doing
the high level design/architecture of
these chips is measured in the 100?s. Most of the time the architects (I was one) write
documentation in excruciating detail as to how
something is to work (and why) to be handed off to the design team(s) to actually
implement. In many ways it would?ve just been
easier/faster to write ?code? but it?s harder for others to really know the why?s and
wherefore?s and make sure that everything is worked
out properly before hand (on one new chip we literally spent *months* working out all of
the details for the various reset and power
management flows?and that was just the docs describing how it should be done?no
implementation).
Each processor generation shares only a little with previous designs. To try to describe
to someone outside how one of todays processor worked inside would require a book for each
generation. Some parts are the same while other are vastly different.
If the book were several 1000 pages. ;-)
It is interesting that I just read an article about the Chinese creating a faster supper
computer. I suspect that many might think they did it with RISK design while most US made
machines were stuck in CISC machines.
I don't have the real inside scoop but I can tell you what I think. Processors made
today are general purpose. Floating point is a side function and not where the most
emphasis is placed. I suspect that the Chinese designed the processors they used
specifically to do floating point and were not the reuse of general purpose processors.
The RISK/CISC is really not even relevant in todays processors since the main limiting
factor is memory access bandwidth and effective use of caches. The instruction set used is
only to deal with older software.
The issue is that (much like many of the earlier supercomputers) is that they are vector
processors. Today?s supercomputers have a
(large) number of general purpose cores (ie POWER, x86) but they are there to manage the
real work horses which are based on graphics chips. It turns out that modern graphics
chips have enormous FP capabilities. For example, NVIDIA?s newest/baddest GPU
can do 10.6TFLOPS of single precision FP (using 3584 processors on the die). Now multiply
by 100?s of GPUs that are put into modern super computers.
Are they general purpose, no?they require specialized programming to perform the
computations. But the HPC (high performance
computing) guys will do what it takes (and have for decades) to get the most out of the
HW.
TTFN - Guy