21 Jul
2002
21 Jul
'02
1:47 a.m.
Ben Franchuk wrote:
This is for bootstrap/diagnostic style programing
similar to a pdp-8
with 4kw of memory and a TTY. The current CPU design on reset will
load a RIM style program from a bootstrap device that is currently the
serial port. In time I get a PCB board made and burn a erial prom for
the FPGA and add a real floppy disk or IDE interface i/o board.
Just store your RIM loader in the serial PROM after the FPGA configuration.
After the FPGA is configured, it can read the serial PROM into memory.