4 Mar
2011
4 Mar
'11
1:34 p.m.
On Fri, Mar 4, 2011 at 2:22 PM, Tony Duell <ard at p850ug1.demon.co.uk> wrote:
I did not intend to imply that CBM drives changed the spindle speed.
Unfortunately,
I failed to explicitly state the beneficiary of the divide-by-N chip
as being the data
clock, so I can see how it can look that I suggested that it was the motor speed
that was variable.
CBM disks did
that (one of the 65xx processors could affect the
low-order two bits of a divide-by-N chip), and so did 400K Mac floppy
Actually, Commodore drives (at least the 8050 and 1541) kept the spidnle
speed constant and speeded up the data clock on the outside tracks. Yes. The 400K drive (which I believe is much the same
as the drive Terry
was trying to fix) has an input for a PWM motor speec control signal. On
the mac, a counter is loaded from 8 bits of an unused video RAM location
at the end of each scan line (the other 8 bits go to a similar PWM
cirucit for the sound IIRC).
Interesting. I did know the mechanism to that level of detail - I just knew the
speed varied enough to be audibly detected.
The Apple 800K drive is alos variable-speed, but IIRC
the speed control
is handled entirely with the drive. The speed is set depending on what
cylinder the heads are on.
I wasn't sure what was up with the 800K drives, so I didn't say anything. I
did recall that there was some difference from how the 400K drives were
designed, but I didn't know what.
Thanks for clearing up any confusion I may have caused.
-ethan