8 Aug
2016
8 Aug
'16
12:51 p.m.
On Mon, Aug 8, 2016 at 1:19 PM, Chuck Guzis <cclist at sydex.com> wrote:
On 08/08/2016 11:56 AM, Eric Smith wrote:
The FDC9216 is actually a fair bit more sophisticated than the typical
counter-based data separator, which is probably why it works so well.
For details, see US patent 4,472,818:
https://www.google.com/patents/US4472818
I was able to find some info on the internals of
the SMC FD9216 data
separator. WD second-sourced that as the WD9216.
Yeah, that one [...] I'd like to see what the 9216 details are. I suspect it's
nothing more than a counter-based data separator, but it's remarkable
for how well it works. Shouldn't be hard to incorporate into an FPGA or
even a CPLD. From a photomicrograph of the FDC9216 I've
discerned that the PLA
contents in the production part don't exactly match the
patent.
The same (or extremely similar) separator is used in the FDC9229,
which adds write precompensation and head load timing circuitry. A
photomicrograph shows that the PLA contents are very slightly tweaked
from the FDC9216.
SMC later introduced the FDC92C16 and FDC92C36, an improved CMOS datas
eparator, pin-compatible with the FD92C16 but operating at twice the
internal frequency. The difference between the two is the polarity of
the SEPD output.
The FDC92C39 used the improved data separator and was pin-compatible
with the FDC9229.
I don't (yet?) have photomicrographs of the improved CMOS parts.