13 Mar
2016
13 Mar
'16
3:52 p.m.
On Sun, Mar 13, 2016 at 3:48 PM, Eric Smith <spacewar at gmail.com> wrote:
They may effectively have a "sticky" bit,
similar to that used in IEEE
754 FP. A sticky bit is used when shifting an operand right; if any
one bits are shifted into the stick bit position, the sticky bit
becomes 1, but shifting a zero into it does not clear it to zero. IEEE
754 uses the sticky bit to implement correct rounding.
In this case, if there's a sticky bit it would prevent a non-zero
operand mantissa that is shifted right from ever actually reaching
zero. If that operand is negative, that might result in the behavior
you're seeing, where one ULP is being subtracted from the other
operand.
'sticky bit' is what got me through to the 47th test, so it's close but not
quite right. (Assuming I implemented it correctly. "if shifted mantissa is
all ones and any ones were shifted out, then set the mantissa to 0".)
-- Charles