OT? Upper limits of FSB

On Sat, Jan 05, 2019 at 02:02:35AM -0500, Jeffrey S. Worley via cctalk wrote: Yes to both questions. High-speed computer systems no longer resemble the simple diagrams in computer science textbooks where there is a CPU with a parallel bus attached to memory and I/O devices like it's still the 1970s. Sadly, the speed of light has stubbornly failed to increase in line with Moore's Law, so we've had to reduce the length of busses instead. The PC's front-side-bus *was* such a 1970s-style bus, however by the 2000s it had withered from an 8MHz bus snaking all over the board and into and out of ISA cards to a few hundred MHz between just the CPU and the northbridge. To go faster still, the northbridge's functionality moved on-die and the FSB is now ancient history. (If antiquity means "before 2010".) In general, we don't bother with parallel busses any more, just point-to-point self-clocked serial links which can run into the gigahertz range. The bandwidth is increased further if necessary by adding more links, but this is not the same as a parallel bus as each link has its own independent clock and that adds a lot of extra complexity to the receiver.