8 Feb
2003
8 Feb
'03
7:22 a.m.
There's apparently an ability for the 6502 cpu to do more than one thing,
in some cases, during a clock cycle. Whether that can be expressed as my
poor "2 cpu cycles per clock cycle" or whether it's better to refer to
"phases of a clock cycle" I'll leave to the poor folk following this
hread. - Jim
p.s. I almost put "thing" in quotes above but I don't know where the thread
would have meandered in that case. {double chuckle}
Jim Keohane, Multi-Platforms, Inc.
"It's not whether you win or lose. It's whether you win!"
----- Original Message -----
From: "Sellam Ismail" <foo(a)siconic.com>
To: <cctalk(a)classiccmp.org>
Sent: Saturday, February 08, 2003 14:52
Subject: Re: Assembly on a Apple IIc+
Festival
On Sat, 8 Feb 2003, Jim Keohane wrote:
> I'm either being imprecise or various readings I have done were
> imprecise. The reference to "one cycle" instruction may have been
referring
> to there being 2 cpu cycles per clock cycle.
Also, there's the
"pipelining"
some say the
6502 does when the last (or only) byte of an instruction is
acted upon simultaneous to next instruction's 1st byte (opcode) being
fetched
Ok, I didn't realize that "one cycle" != 1 CPU cycle. I just know that
I have a handy chart of how many clock cycles an instruction takes and the
minimum number for any instruction is 2. I guess the key phrase is
"clock cycles". Perhaps it's just semantics?
Of course, we're talking Apple ]['s
which, if I can trust my memory,
steal every other clock cycle to refresh memory.
I don't know myself.
Sellam Ismail Vintage Computer
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