11 Apr
2017
11 Apr
'17
4:53 p.m.
Chuck Guzis via cctalk wrote on Tue, 11 Apr 2017 09:37:27 -0700
On 04/10/2017 02:23 PM, Eric Smith wrote:
I consider the heart of any modern high performance CPU to be a dataflow
architecture (described as an "out of order execution engine") with a
hardware to translate the macrocode (CISC or RISC) to the dataflow graph
and tokens on the fly.
-- Jecel
When the 432 project (originally 8800) started,
there weren't many
people predicting that C (and its derivatives) would take over the world.
That's the danger of a too-aggressive CISC, isn't it? I suppose that
it's safe to say that if you look under the hood of any modern CPU,
there's a RISC machine in there somewhere.