The 730 was also the slowest VAX on the planet.. save the Microvax I.
They used the 2901s bit slice data path chip, but I'm not certain they used
the AM2910 usequencer. VHDL and verilog models ~are~ available for both
those chips.
I think though, it would be quite a bit of work to verbatim copy/translate
those schematics..
Then you'd have to scarf the microcode from a 730 boot tape ;)
I can help there since I have both a working 730 and a boot tape!
btw - the pdp11/40 and VAX/780 have already been implemented on an FPGA!
A better way would be to look at what this prof in Japan did -he's written a
complete working
pdp11/40 on a smallish altera fpga- - it even runs UNIX V6! and had an IDE
hd interface.
http://shimizu-lab.dt.u-tokai.ac.jp/pop11.html pictures here:
http://shimizu-lab.dt.u-tokai.ac.jp/pop11pics.html
here is the paper
http://csdl.computer.org/comp/proceedings/asp-dac/2004/2543/00/25430571.pdf
Get the files here:
http://shimizu-lab.dt.u-tokai.ac.jp/ and note the VAX
780 project announcement.
They show here that they are nearly complete on their VAX 780 on a chip
project.
Both the 780&11/40 are written in SFL - a nice but unpopular C-like HDL.
This PDP is not microcoded.
The tools are freely downloadable as well as the PDP11/40 source - so you
can play
on winblows and linux. I got both versions of the 11/40 to run but alas..
they don't boot V6.
The makefile compiles SFL to verilog using a closed compiler SFL2VL written
by the prog.
It seems to run run fine on Icarus/verilog and simulate, but I have been
unable to
import that verilog successfully into Alteras or Xilinx's free software
targetting a spartan2.
Sad, as I wanted to use this as a front end to my PDP10 project written in
SFL;) As far
as PDP11s go - I'd be curious to try to implement an SFL WD1611/1621 and
runing LSI11
microcode on an FPGA..
regards
Heinz
Patrick Finnegan wrote:
To: "General Discussion: On-Topic and Off-Topic Posts"
<cctalk at classiccmp.org>
Subject: Re: Create a VAX CPU with FPGA?
9000 VAX declared on Thursday 03 March 2005 11:08 pm:
> There are many "soft CPUs" around. I wonder how hard it is to create
> a soft VAX CPU core that can be load into an FPGA. Other than to
> design from scratch, I think it might be easier if we grab the
> VAX-11/780, 750, or 730 schematics, and throw them into an FPGA
> compiler. The 780 was implemented with TTL, the 750 with gate array,
> and 730 with AMD 2901. I think the 730 scheme might be the easiest to
> implement with an FPGA.
>
> So, does anybody have the 730, 750 or 780 schematics? No, I do not
> plan to start the project. I just want to make sure whether it is
> feasible. Thank you.