These are easily programmed using zero-cost
development software you
can download from the Xilinx web site, and a simple parallel port
cable you can build yourself easily.
The software may be 'free', but the machine to run it on, and the OS to
run it under, most certainly aren't. And I do have an objection to
trusting my design to a piece of binary-only software that I have no easy
way of checking if it's doing the right thing (it's very difficult to be
sure a CPLD or FPGA is doing the right thing under _all_ conditions).
I would mind if they'd properly document the chips so I could write my
one CAD software if I wanted to. But they don't. AFAIK there is no 100%
documented CPLD or FPGA available (100% documented meaning you can go
from design to chip without proprietary software or a
proprietary
programmer).
Having hand-wired TTL running at over 50MHz and ECL at at least twice
that, I'll stick to ways I can debug and that I know work. I've got
enough TTL to last me for quite a time...
-tony