5 Aug
2008
5 Aug
'08
2:03 a.m.
On 4 Aug 2008 at 23:20, Tony Duell wrote:
IMHO it would have been better if the physical
address outputted by an 80286 for the first instruction after reset was
FFFFF0 (not 0FFFF0). One way to do this would have been similar to the
PDP11 I/O address trick (which is why I brought that up), namely that in
real mode, the 'extra' 4 address lines of the 80286 (over the ones of the
8086) are all set to the same state and that state is the logical AND of
the top so-many-bits of the current segment register.
My gripe with all of the X86 series is that there are no status lines
indicating which segment register is being used to generate an
address. The NEC V40, for example, tells you this, so you can have 4
separate address spaces of 1M each. Fetching from a different space
on reset is a no-brainer to implement.
Cheers,
Chuck