On 17 Jun 2011 at 15:21, Dan Roganti wrote:
I hope you don't expect all databooks past &
present to be revised :)
These were always written in the context of positive logic.
No, but I do expect the knucklehead drawing the schematic to use the
symbol that best describes the function of the gate.
I'm still not following you--if you're referring to voltage levels
being positive or negative, e.g. ECL, I still consider that to be
positive logic (as expressed in the databooks), even though both
logic 1 and 0 are more negative that 0V, but 1 is more positive than
0. But that's just a convention.
If you're talking about designing in DeMorgan equivalents, I don't
see the issue, unless one is unpracticed. One should be as natural
as the other--looking at a truth table, one should see it in both
senses.
But I don't know how logic design is taught nowadays...
--Chuck