On Jun 16, 2008, at 10:07 PM, David Kane wrote:
Read the $%#!
manual to put it bluntly. A simple guess is once your
design is larger than a small card, you need I/O buffering. I think
a 6800 cpu can drive about 150 pf and a typical load is 10 pf at
rated speeds.
Should that be mA for load? I am pretty much a noob at EE and
design, but I
did manage to get my head around fanout and loading calculations.
They feel
funny at first when self teaching yourself and then all of a sudden
make
sense.
Here, what the 6800 can drive in terms of capacitance is another
way of stating its output drive current capability.
I'll expound for the benefit of those who haven't gotten their
head around it yet. I thank our very own Tony Duell for helping *me*
get my head around this many years ago, when my nice clean square
waves were turning into deformed triangles as I tried to drive a big
FET for an IR transmitter in a commercial product.
This is a simplification, but it gets the point across. Think of
it in terms of a signal changing state from 0 to 1.
CMOS chips are FET-based, and the input of a CMOS logic gate
typically goes to the gate ("gate" in FET terms, not logic terms) of
a FET. The FET's gate is essentially a tiny capacitor. To turn the
FET on, one must charge that capacitor. So, you need to raise the
voltage on the FET's gate from ~0V to ~2V (the 74HCT 0-1 threshold
according to Fairchild's AN-368 app note).
The higher the capacitance of that logic gate's input (which is
the gate capacitance of the input FET, typically Ciss on transistor
datasheets) the more current it'll take to charge it to a the 0-1
threshold voltage in a given amount of time. If the capacitance is
lower, it'll take less current.
Now, recall that capacitances in parallel add up...so if the input
capacitance of (say) a 74HCT245 is 3.5pF (from the datasheet), if you
put five 74HCT245 inputs on a bus line, the total capacitance
(excluding PCB traces, etc) is 5*3.5 = 17.5pF...requiring more drive
capability from whatever is driving that bus line.
So if the drive capability is insufficient, the rise time of the
pulse will lengthen, and turn that nice sharp rising edge into a long
sweeping transition, screwing up the timing and confusing lots of
things.
-Dave
--
Dave McGuire
Port Charlotte, FL