1 Dec
2005
1 Dec
'05
12:49 p.m.
Subject: Re: Do old FPGA's decay?
From: Brad Parker <brad at heeltoe.com>
Date: Thu, 01 Dec 2005 07:28:29 -0500
To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at
classiccmp.org>
"Chuck Guzis" wrote:
I looked up the ISP2064 (lattice) and that is the case. Also if the mode
pins are set a differnt way it can parallel load from a common ee/e/rom
or microprocessor.
Allison
But do old FPGA's just quietly go belly-up? Or is there something about
the XC2064-50 that I'm in the dark about? Are there any easy tests that I
can apply to confirm my suspicions?
Doesn't it need to be 'loaded', either via a eeprom or the pcu?
Most older fpga's (I thought) had to be programmed at startup via some
form of bit-serial line. This is often something like an i2c eeprom
directly attached to the chip.
I have not looked that XC2 datasheet, however. (actually, I'm having trouble
finding one...)
-brad